The present invention generally relates to a method for forming a fine pattern of a semiconductor device which has a pitch beyond a lithography limit.
Due to the popularization of information media such as computers, semiconductor device technology has advanced rapidly. Semiconductor devices are required to operate at a high speed and to have a high storage capacity. As a result, manufacturing technology of semiconductor device is required to manufacture a memory device of high capacity with improved integration, reliability and characteristics for accessing data.
In order to improve integration of the device, photolithography technology has developed to form finer patterns. The photolithography technology includes an exposure technology using chemically amplified Deep Ultra Violet (DUV) light sources such as ArF (193 nm) and VUV (157 nm), and a technology for developing photoresist materials suitable for the exposure light sources.
The processing speed of semiconductor devices depends on the line-width of patterns. For example, as the pattern line-width is decreased, the processing speed is increased to improve device performance. Therefore, it is important to control a critical dimension of the pattern line-width depending on the size of the semiconductor device.
A conventional method for forming a fine pattern of a semiconductor device is described as follows.
An underlying layer is formed over a semiconductor substrate, and a photoresist pattern is formed over the underlying layer by a lithography process. The photoresist pattern is obtained by coating photoresist over the underlying layer, and performing an exposure and developing process on the resulting structure. The underlying layer is etched using the photoresist pattern as an etching mask, and the photoresist pattern is removed to form an underlying pattern.
However, it is difficult to reduce the line-width of patterns due to a resolution limitation of lithography equipment.